SN74LVC112ADBLE المضاربه : DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET

SN74LVC112ADBLE مماثلة

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- 3.3 V ABT 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
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- DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74HC02DBR
- QUADRUPLE 2-INPUT POSITIVE-NOR GATES

SN74LVC112ADBLE Datasheet والمضاربه

الصانع : TI

التعبءه : DB

دبابيس : 16

درجة الحراره : دقيقة -40 °C | الاقصى 85 °C

حجم : 140 KB

التطبيق : DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET